PIC18F6410-I/PT【PDF 64/411 页】IC PIC MCU FLASH 8KX16 64TQFP

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Sheet目录3840

60页 61页 62页 63页 [64页]65页 66页 67页 68页

PIC18F66K80 FAMILY

DS39977F-page 156

2010-2012 Microchip Technology Inc.

REGISTER 10-8:

PIR5: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 5

R/W-0

IRXIF

WAKIF

ERRIF

TXB2IF

TXB1IF

TXB0IF

RXB1IF

RXB0IF/

FIFOFIF

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

IRXIF:

Invalid Message Received Interrupt Flag bits

= An invalid message occurred on the CAN bus

= No invalid message occurred on the CAN bus

bit 6

WAKIF:

Bus Wake-up Activity Interrupt Flag bit

= Activity on the CAN bus has occurred

= No activity on the CAN bus

bit 5

ERRIF:

Error Interrupt Flag bit (Multiple sources in COMSTAT register)

= An error has occurred in the CAN module (multiple sources)

= No CAN module errors have occurred

bit 4

TXB2IF:

Transmit Buffer 2 Interrupt Flag bit

= Transmit Buffer 2 has completed transmission of a message and may be reloaded

= Transmit Buffer 2 has not completed transmission of a message

bit 3

TXB1IF:

Transmit Buffer 1 Interrupt Flag bit

= Transmit Buffer 1 has completed transmission of a message and may be reloaded

= Transmit Buffer 1 has not completed transmission of a message

bit 2

TXB0IF:

Transmit Buffer 0 Interrupt Flag bit

= Transmit Buffer 0 has completed transmission of a message and may be reloaded

= Transmit Buffer 0 has not completed transmission of a message

bit 1

RXB1IF:

Receive Buffer 1 Interrupt Flag bit

Mode 0:

= CAN Receive Buffer 1 has received a new message

= CAN Receive Buffer 1 has not received a new message

Modes 1 and 2:

= A CAN Receive Buffer/FIFO has received a new message

= A CAN Receive Buffer/FIFO has not received a new message

bit 0

Bit operation is dependent on the selected mode:

Mode 0:

RXB0IF:

Receive Buffer 0 Interrupt Flag bit

= CAN Receive Buffer 0 has received a new message

= CAN Receive Buffer 0 has not received a new message

Mode 1:

Unimplemented:

Read as ‘0’

Mode 2:

FIFOFIF:

FIFO Full Interrupt Flag bit

= FIFO has reached full status as defined by the FIFO_HF bit

= FIFO has not reached full status as defined by the FIFO_HF bit

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